Comment rendre un Makefile plus court?

Question

J'ai le Makefile suivant:

all: hello.exe hellogtk.exe hellogtktng.cs 

hello.exe: hello.cs 
gmcs hello.cs 

hellogtk.exe: hellogtk.cs 
gmcs -pkg:gtk-sharp-2.0 hellogtk.cs 

hellogtktng.exe: hellogtktng.cs 
gmcs -pkg:gtk-sharp-2.0 hellogtktng.cs 

clean: 
rm -f *.exe 

Je commence seulement à apprendre à écrire Makefile, et je pense que tout cela est un peu répétitif. Comment les professionnels de Makefile vont-ils faire cela?

Answer 1

all: hello.exe hellogtk.exe hellogtktng.exe 

%.exe: %.cs 
gmcs -pkg:gtk-sharp-2.0 $< 

clean: 
rm -f *.exe 

Answer 2

Here's how you can add flags to specific targets.

# An empty variable for flags (Not strictly neccessary, 
# undefined variables expand to an empty string) 
GMCSFLAGS = 

# The first target is made if you don't specify arguments 
all: hello.exe hellogtk.exe hellogtktng.exe 

# Add flags to specific files 
hellogtk.exe hellogtktng.exe: GCMSFLAGS = -pkg:gtk-sharp-2.0 

# A pattern rule to transform .cs to .exe 
# The percent sign is substituted when looking for dependancies 
%.exe:%.cs 
    gmcs $(GMCSFLAGS) $< 
# $() expands a variable, $< is the first dependancy in the list